Switch mode power supplies (SMPS) are well established in our modern world.
Their mainadvantages are the realization of high efficiency and energy
saving potential. Another benefitand design objective is a high power
density to reach lightweight systems of small size.This thesis focuses on
the benefits and the challenges of three stage DC-DC converters inSMPS
applications. They are compared to state-of-the-art two stage DC-DC
converters forhigh power and low output voltages. Possibilities for
improvement of technical and miscellaneousparameters should be shown.The
obtained information refers to power supply systems with maximum input
power of3680 W. This is the maximum power of a 230 V single phase supply
with a 16 A fuse. Themain applications are server and telecommunication
AC-DC power supplies.Due to the complexity of SMPSs all investigations in
this work have a mainly experimentalbackground. Theoretical descriptions
and calculations would require large simplifications ofthe real system.
Thus, gained results would become inaccurate.Simulations and calculations
are used during the practical implementation.Six SMPS demonstrators were
developed during this dissertation work. All these systemswere designed
with the same specification i.e. for 12 V output voltage and 800 W
outputpower. As a comparison an 800 W two stage power supply from Infineon
Technologies AGwas used.Three stage solutions can overcome the trade-offs
in two stage power supplies. The optimizationproblem in a two stage SMPS is
to find a compromise between the bulk capacitor size(cost) and the design
of the DC-DC converter regarding the input voltage range. Three stagepower
supplies use an extra stage to decouple the output power regulation from
the mainstage. The main stage operates like a DC transformer. This stage
can be optimized for operationat a 100 % duty cycle. Furthermore this is a
good basis for zero voltage switching (ZVS)or resonant switching
respectively. The extra stage can be implemented as a simple
highlyefficient buck converter which can easily cope with the wide input
voltage range.There are two ways to arrange the buck stage. One possibility
is on the primary side of thetransformer in a pre regulated concept. Here
the buck converter supplies the main stage with aconstant voltage. Another
possibility is an arrangement on the secondary side of the mainstage in a
post regulated concept. The DC transformer stage transfers the bulk voltage
with allvariations to the secondary side. The following buck stage has to
maintain a constant outputvoltage.The two stage demonstrator is a voltage
fed, hard switching half bridge with power factorcorrection (PFC) stage.The
following pre regulated three stage powers supplies were investigated:
current fed pushpull converter, current fed full bridge converter and a
current fed parallel resonant converter.The research of post regulated
three stage SMPSs concentrates on: hard switching half bridge,serial
resonant converter and an LLC converter. All three stages operate with a
PFC stage.The main results of this dissertation are summarised below.The
following characteristics apply to pre regulated switch mode power
supplies: The mainprimary side MOSFETs in the current fed push pull
converter and in the current fed fullbridge converter are stressed with
high voltages. However, the secondary side rectifier MOSFETsin all current
fed systems operate with low voltage stress.The current fed parallel
resonant converter is a modification of the current fed full bridge
converterto achieve low switching losses in resonant mode operation. The
stress on the activecomponents is analogue to the full bridge converter. A
drawback of this solution is the loaddependent resonant and transfer
behaviour.The implementation of synchronous rectification control in these
current fed systems needssome effort. Self driven circuits were not
sufficient.A topology with a current fed main stage is not adequate for the
generation of high currentsand low output voltages. The main reason for
this is the high stress on the active componentsdue to the leakage
inductance in the system.Post regulated power supplies are characterised by
the following facts: The investigation onthe hard switching half bridge
revealed load dependent transfer behaviour. Therefore this converteris
unsuitable for a DC transformer application. Furthermore a limitation choke
for thecurrent rise and clamping diodes was necessary to achieve ZVS and
low voltage stress on thesecondary side rectifiers. Also, due to the
occurring voltage drop the limitation choke reducesthe converter output
power.The serial resonant converter is suitable as a DC transformer in high
output power applications.The load current is used to charge the output
capacitances of the MOSFETs to achieveZVS condition. The ZVS condition is
lost at light load operation, influenced by the switchingfrequency,
interlock time and the angle of switching. If the ZVS condition is lost,
the primaryMOSFETs in the resonant converter operate in hard switching mode
with high switchinglosses.A modified serial resonant topology, the LLC
converter, solves the problem of losing ZVS atlight load operation. ZVS
condition is supported by the transformer magnetising currentwhich is
independent of the load current. ZVS condition can be achieved over a wide
operationrange to limit losses in the primary side MOSFETs. The LLC
converter is a real load independentDC transformer. This is a major result
of this research.The main advantage of a three stage solution compared to a
two stage power supply is thereduction of the bulk capacitance. The voltage
variation at the bulk capacitor during a brownoutis regulated with a simple
buck converter. The reduced bulk capacitance leads to cost savingsand a
gain in power density. The galvanic isolation and the output regulation is
separatedin a three stage concept, therefore the design of the stages is
quite simple.Every stage can operate independently, therefore the system
gains degrees of freedom. Morefreedom in design leads to a better
adjustment between three stage SMPS and application.If required, a
synchronisation between the stages can be implemented. The load current of
thebulk capacitor can be reduced by synchronising the PFC stage and the
following stage in highpower system.Normally, the design of the different
stages in a three stage SMPS is quite simple, because ofthe spreading of
the output power regulation and the galvanic isolation to different
stages.This separation could be used in a three stage LLC converter to
reach a gain in efficiencycompared to a two stage setup.The possibility for
discrete optimisation of the stages leads to an optimised SMPS system.The
main drawback of a three stage solution is the higher component count,
compared to atwo stage supply. However, higher component count and system
costs do not correlate directly.A practical comparison between the
investigated power supplies showed a similar costlevel.The major goal of
the thesis, to achieve a gain in efficiency with three stage SMPSs
comparedto a two stage solution, was not reached completely. The main
reason is the high switchingfrequency in the different stages. High
switching frequency leads to high switching losses inthe switches.At full
load operation the efficiency of the three stage LLC converter was less
than in the twostage SMPS. However, at light load the situation reversed.
The three stage LLC converterreached higher efficiency than the two stage
SMPS.Due to the reduction of bulk capacitor size, an improvement of power
density was reachedwith three stage solutions, compared to two stage
SMPSs.This investigation highlights the qualitative properties of the
different topologies. All quantitativestatements in this work refer to
current state-of-the-art semiconductors and passivecomponents. Due to the
permanent development in these fields all conclusions are only
indicative.In this research currently common switching frequencies have
been proven. Therefore, theefficiency values show not the maximum values
for these topologies. A reduction of theswitching frequency would lead to a
gain in total efficiency. By using state-of-the-art semiconductorsand
passive components, switching frequencies of about 70 kHz to 130 kHz
areoptimal for achieving high efficiency.For high output power interleaved
topologies in combination with low switching frequencies(70 kHz to 130 kHz)
are reasonable. Cancellation effects caused by control can be used toreduce
passive components stress in these topologies.It became clear that the LLC
converter with secondary side buck converter is the best threestage
solution. Due to the excellent properties in a three stage solution the
combination of anLLC converter with a primary side buck stage is
reasonable, too. This setup would facilitatethe design of the buck
regulator stage. This configuration could be investigated in
ongoingresearch. An efficiency estimation is already given in this thesis.