FPGA implementation of a multi-view stereo approach for depth estimation and image reconstruction for plenoptic cameras
In this paper a concept for an algorithm for depth estimation and image reconstruction for a plenoptic camera is presented. The algorithm follows a multi-view stereo approach and is intended for an FPGA-based Xilinx Zynq Ultrascale+ SoC platform to allow for real-time processing in an embedded environment. The micro-lens array separates a complete image in many micro-images. The micro-images are considered as individual cameras and the processing is calculated in a multi-view stereo approach. To accomplish an adequate frame rate and a reasonable resolution efficient processing steps and fixed-point integer calculation are chosen. The conceptual algorithm will be implemented and tried out in an experimental setting in 2019.