A multiprocessor DSP System for a high throughput control application
This paper describes the hardware concept and realization of an experimental multiprocessor system with Digital Signal Processors TMS320C6701. For convenience and efficiency piggyback modules have been used. The structure is organized in master-slave manner. The slaves are accessed from the master through their host port interfaces. Special address decoding provides broadcasted write from the master to all slaves besides individual read and write access. Some experimental results are provided.